The present invention is concerned with fast voltage ramp generators and particularly voltage ramps of nano-second and sub-nano-second duration.
One application of such very fast voltage ramps is in the drive to the sweep plates of single shot streak image converter tube cameras.
Hitherto, the sweep plates of a known prior art streak camera have been driven from a chain of avalanche transistors typically connected in series. One transistor of the chain would be triggered into avalanche switching by applying a positive going voltage pulse to the base of the transistor. The remaining transistors of the chain would then slave trigger from the resultant step voltage transient across them.
The extreme rapidity of the avalanche action, together with the difficulty of matching a high voltage switching ramp for display on an oscilloscope, make it almost impossible to monitor the waveforms of the switching processes in such transistor chains by conventional means. However, studying the performance of a streak camera containing such switching chains suggests that the voltage transients produced are non-uniform in nature and cause jitter in the resulting streak camera timing over femto-second timing intervals.
FIG. 1 illustrates a prior art switching chain used for producing a high speed ramp to drive the sweep plates of a streak camera. The chain comprises a chain TR1 to TRn of small signal high gain--bandwidth product NPN avalanche transistors. The triggering input 9 to the circuit is coupled by means of a transformer T1 to the base-emitter junction of the transistor TR1 at the bottom of the chain. The bases and emitters of the other transistors TR2 to TRn are connected together.
To minimise triggering delay, it is known to operate such a chain of avalanche transistors static biased to the collector-base breakdown voltage of the transistors. Thus, the voltage applied across the chain (+V.sub.cc) should exceed the sum of the collector-base breakdown voltages of the transistors TR1 to TRn of the chain. A resistor R1 regulates the quiescent breakdown current of the chain to a value below that which would cause avalanche switching of the transistors of the chain. Avalanche switching of any of the transistors which have base and emitter terminals effectively connected together would arise if the collector-base breakdown current of the transistor exceeded a value at which the voltage drop across the intrinsic base-emitter resistance of the transistor causes the emitter-base junction to become forward biased.
With the chain of transistors operating in the above described mode, the whole chain can be avalanche switched by the application of a forward biasing current pulse to the bottom most transistor TR1 of the chain via a triggering transformer T1.
A capacitance C1 across the transistor TR1 ensures this transistor is capacitively loaded. If an avalanche transistor is only resistively loaded, on triggering, the collector voltage of the transistor switches only from its collector-base breakdown voltage to a value near its collector-emitter breakdown voltage. These two voltages can be relatively close so that the effect of switching is a small change of voltage. However, if the transistor is capacitively loaded, sufficient current is available from the capacitor on avalanche switching of the transistor to cause the transistor to saturate so that the collector voltage of the transistor drops from the collector-base breakdown voltage, typically 130 volts, to the collector-emitter saturation voltage, typically about 1 volt.
Accordingly, on triggering of the transistor TR1, the presence of capacitor C1 causes the collector of this transistor to change rapidly between the above two voltages, producing a negative voltage transient of typically 130 volts applied to the emitter of the next transistor TR2 of the chain, and which then propagates up the chain to the emitter of the uppermost transistor TRn. The negative voltage transient initiates the avalanche multiplication process in the base region of each transistor as the emitter of the transistor receives the negative transient. If all the transistors are well matched, the triggering times for each transistor are very similar, probably to within a few pico-seconds. When the voltage transient reaches the emitter of the uppermost transistor TRn, this transistor is capacitively loaded by capacitance C3 so that TRn can also saturate. The resulting avalanche collector current through transistor TRn propagates back down the chain towards TR1.
The avalanche action that has been initiated in each of the devices TR2 to TR(n-1) is initially primarily resistively loaded so that these transistors initially switch only between the collector-base breakdown voltage and the collector-emitter breakdown voltage for each transistor. However, the transistors near the top of the chain may see sufficient charge stored in the stray capacitance to provide sufficient current to saturate the transistor as it performs avalanche switching. In essence, while TR2 and the transistors near the bottom of the chain will probably switch with relatively small changes in collector voltage, the transistors at the top of the chain will be more likely to switch to the saturation voltage levels, i.e. with large voltage excursions. Thus, when the relatively large current transient initiated by switching of transistor TRn starts to travel down the chain, most of the other transistors will have already performed their switching but in some cases to the saturation voltage level and in other cases only to the collector-emitter breakdown voltage level. Where the downwardly travelling current transient comes to a transistor which has hitherto switched only to the collector-emitter breakdown voltage level further time will be required to complete the further switching of that transistor, under the influence of the current transient, to the saturation voltage level.
The effect may be the production of small, random perturbations in the voltage gradient at the collector of the uppermost transistor TRn. In practice, when ramp generators of the kind described above with reference to FIG. 1 are used to drive the deflection plates of an image converter tube used for streak recording, shortcomings have been observed such as shot-to-shot jitter, out of focus and/or distorted images at higher streak writing rates, and considerable loss of ramp linearity, particularly over the initial parts of the ramp which would otherwise be the fastest, most useful sections. These shortcomings can be explained by the above indeterminate sequence of conduction switching in the transistors of the chain.
In the prior art circuit of FIG. 1, C2 represents the overall capacitive circuit load for the ramp generator and resistor R2 is a limiting resistor required to limit the switched current to a safe value to prevent damage to the switching transistors. In practice, the illustrated additional capacitor C3 which is provided to assist the start up of avalanche conduction may be dispensed with since sufficient capacitance may be provided by stray capacitances to ground.
It has also been observed that if the load capacitance C2 is too great and/or the limiting resistor R2 is too small, the first device in the prior art chain of transistors to be damaged is always TR2, followed sequentially by TR3, TR4 etc. This may be explained by considering the effects of the load current transient descending from the uppermost transistor TRn on the other transistors which may be in various conduction modes. When the current surge reaches TR1, this transistor is already close to short circuit. Classical transmission line theory would suggest that the effect of the current transient encountering such a short circuit would be to cause the instantaneous current conducted by TR2 to be nearly twice the incident current value of the propagating transient. If transistor TR2 has at this time performed only a small collector voltage type switching, i.e. to the collector-emitter breakdown voltage, the instantaneous power dissipation in the device would destroy the device unless the current transient is substantially limited by providing a sufficiently high value for resistance R2.
In view of the above, existing practices, as illustrated in the circuit of FIG. 1, in the production of very fast voltage ramps particularly for the sweep plates of streak image converter tube cameras, have provided unreliable timing performance at high streak rates and required relatively low capacitance and high resistance load to avoid damage to the switching transistors.